The present invention relates to the time of day clock for a computer. More particularly, it relates to generating the time of day clock for the computer from the same clock source for a processor in the computer.
The time of day (TOD) clock provides a consistent measure of elapsed time suitable for the indication of date and time. Usually, the time of day clock has a binary register with a number of bit positions that determines the elapsed time capacity and the resolution of the TOD clock. Time is measured by incrementing this register following rules for fixed point arithmetic. In the basic form, the register is incremented by adding one to a particular bit position every fixed period of time. For instance, say that you had a 51 position counter with an elapsed time capacity of 143 years the 51st position would be incremented once every microsecond. In models of the same elapsed time capacity but with higher or lower resolution, a lower or higher order bit position is incremented so that the rate of advancement of the clock is the same as if a 1 was added to position 51 every microsecond.
It has been suggested in an article entitled "Regulation of the Time of Day Clock" that appeared in the December 1974 issue of the IBM Technical Disclosure Bulletin, beginning on page 2043, that the time of day clock be run in synchronism with a clock for the processor by incrementing the time of day clock by a fixed amount every cycle of the processor clock. Typically, the fixed amount is not a whole number or integer so that it had to be synthesized. For instance, if the TOD clock is required to count to 4096 every microsecond using a 25 ns processor clock, 102.4 must be added to the count of the TOD clock in each cycle of the system clock. This can be achieved by adding 103 to the count of the TOD clock for every 4 out of 10 cycles of the processor clock and 102 to the count for the remainder of the 10 cycles. Because the system clock is imprecise, it is checked against a standard clock and the ratio of high to low counts is changed to keep the TOD clock within its precision standard. For instance, for a reduction of 0.120 in the 25 ns processor clock, the time of day counts must be incremented by 103 for 0.5 out of every 10 cycles.